How To Fix Soft Error Reliability (Solved)

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Soft Error Reliability

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We propose a new class of better-than-worst-case soft error reliability techniques called AVF throttling, that trade concurrency for reducing the amount of processor state vulnerable to soft errors. The bad data bit can even be saved in memory and cause problems at a later time. morefromWikipedia Thread (computer science) morefromWikipedia Magnetic field A magnetic field is a mathematical description of the magnetic influence of electric currents and magnetic materials. Wikipedia® is a registered trademark of the Wikimedia Foundation, Inc., a non-profit organization. check over here

Correcting soft errors[edit] Main article: ECC memory Designers can choose to accept that soft errors will occur, and design systems with appropriate error detection and correction to recover gracefully. Further reading[edit] Ziegler, J. Reliability is often measured as probability of failure, frequency of failures, or in terms of availability, a probability derived from reliability and maintainability. Ziegler led a program of work at IBM which culminated in the publication of a number of papers (Ziegler and Lanford, 1979) demonstrating that cosmic rays also could cause soft errors. https://en.wikipedia.org/wiki/Soft_error

Soft Error Rate

IEEE T Nuc Sci, 2011, 58: 2493–2502CrossRefGoogle Scholar73.Munteanu D, Autran J L. Role of the deep parasitic bipolar device in mitigating the single event transient phenomenon. In this application the glass is formulated with a boron content of 4% to 5% by weight. Get Help About IEEE Xplore Feedback Technical Support Resources and Help Terms of Use What Can I Access?

  1. SEU prediction from SET modeling using multi-node collection in bulk transistors and SRAMs down to the 65 nm technology node.
  2. Based on the comparison, we argue that while AVF throttling may provide a smaller absolute reliability improvement, it significantly reduces the power consumption and complexity overhead, making the three techniques appropriate
  3. Novel layout technique for single-event transient mitigation using dummy transistor.
  4. In: Custom Integrated Circuits Conference.
  5. Piscataway: IEEE, 2002. 216–225Google Scholar50.Mitra S, Ming Z, Seifert N, et al.

When the same test setup was moved to an underground vault, shielded by over 50 feet (15m) of rock that effectively eliminated all cosmic rays, zero soft errors were recorded.[9] In Errors may be caused by a defect, usually understood either to be a mistake in design or construction, or a broken component. Traditionally, DRAM has had the most attention in the quest to reduce, or work-around soft errors, due to the fact that DRAM has comprised the majority-share of susceptible device surface area Cosmic Ray Bit Flip The concept of triple modular redundancy (TMR) can be employed to ensure very high soft-error reliability in logic circuits.

Please try the request again. Soft Error Vs Hard Error Skip to Main Content IEEE.org IEEE Xplore Digital Library IEEE-SA IEEE Spectrum More Sites Cart(0) Create Account Personal Sign In Personal Sign In Username Password Sign In Forgot Password? IEEE Transactions on Nuclear Science. 51 (6): 3427–3434. http://ieeexplore.ieee.org/abstract/document/7092416/ Boron-11 is a by-product of the nuclear industry.

IEEE T Nuc Sci, 2008, 55: 3394–3400CrossRefGoogle Scholar2.Sierawski B D, Mendenhall M H, Reed R A, et al. Difference Between Soft Error And Hard Error Tsuchiya, H. IEEE T Nuc Sci, 2013, 60: 4374–4380CrossRefGoogle Scholar60.Pagiamtzis K, Azizi N, Najm F N. IEEE T Dev Mat Rel, 2011, 11: 551–554CrossRefGoogle ScholarCopyright information© Science China Press and Springer-Verlag Berlin Heidelberg 2014Authors and AffiliationsDu Tang1ChaoHui He1Email authorYongHong Li1Hang Zang1Cen Xiong1JinXin Zhang11.School of Nuclear Science and TechnologyXi’an Jiaotong UniversityXi’anChina About this article Print ISSN

Soft Error Vs Hard Error

Controlling alpha particle emission rates for critical packaging materials to less than a level of 0.001 counts per hour per cm2 (cph/cm2) is required for reliable performance of most circuits. Piscataway: IEEE, 2007. 1–6Google Scholar80.Nieuwland A K, Jasarevic S, Jerin G. Soft Error Rate Piscataway: IEEE, 2008. 181–186Google Scholar39.Dixit A, Wood A. Soft Error Rate Calculation In: Proceedings of the Symposium on Computer Architecture and Digital Systems.

The thermal neutron flux from sources other than cosmic-ray showers may still be noticeable in an underground location and an important contributor to soft errors for some circuits. check my blog In: IEEE International Reliability Physics Symposium Proceedings. Modeling the effect of technology trends on the soft error rate of combinational logic. morefromWikipedia Reliability engineering Reliability engineering is an engineering field that deals with the study, evaluation, and life-cycle management of reliability: the ability of a system or component to perform its required Bit Flip Memory Error

Ars Technica. US & Canada: +1 800 678 4333 Worldwide: +1 732 981 0060 Contact & Support About IEEE Xplore Contact Us Help Terms of Use Nondiscrimination Policy Sitemap Privacy & Opting Out In the context of circuit operation, this erroneous output value may be considered a soft error event. this content Retrieved 2015-03-10. ^ Dan Goodin (2015-03-10). "Cutting-edge hack gives super user status by exploiting DRAM weakness".

Influence of user-controlled parameters in alpha particle-induced single-event error rates in commercial SRAM cells. Dram Soft Error Rate The law is named after Intel co-founder Gordon E. Soft errors involve changes to data—​​the electrons in a storage circuit, for example—​​but not changes to the physical circuit itself, the atoms.

If all three masking effects fail to occur, the propagated pulse becomes latched and the output of the logic circuit will be an erroneous value.

Tunable transient filters for soft error rate reduction in combinational circuits. Low-energy proton-induced single-event-upsets in 65 nm node, Silicon-on-Insulator, latches and memory Cells. Heavy-ion-induced digital single event transients in a 180 nm fully depleted SOI process. Soft Errors In Advanced Computer Systems Cosmic ray flux depends on altitude.

IEEE T Nuc Sci, 2012, 59: 950–957CrossRefGoogle Scholar10.Martinie S, Autran J, Sauze S, et al. Soft-errors induced by terrestrial neutrons and natural alpha-particle emitters in advanced memory circuits at ground level. Single-event charge collection and upset in 40-nm dual- and triple-well bulk CMOS SRAMs. http://unordic.com/soft-error/soft-error-mitigation.html Piscataway: IEEE, 2012. 1–6Google Scholar82.Casey M C, Bhuva B L, Black J D, et al.

Detecting soft errors[edit] There has been work addressing soft errors in processor and memory resources using both hardware and software techniques. In a computer's memory system, a soft error changes an instruction in a program or a data value. Microelectr J, 2009, 40: 1000–1006CrossRefGoogle Scholar72.Sayil S, Boorla V K, Yeddula S R. Mukherjee, S, "Architecture Design for Soft Errors," Elsevier, Inc., Feb. 2008.

IEEE T Dev Mat Rel, 2013, PP: 1–1Google Scholar4.Ahlbin J R, Massengill L W, Bhuva B L, et al. IEEE T Nuc Sci, 2012, 59: 2658–2665CrossRefGoogle Scholar34.Olmos M, Gaillard R, Van O A, et al. Neutrons are uncharged and cannot disturb a circuit on their own, but undergo neutron capture by the nucleus of an atom in a chip. The effectiveness of TAG or Guard-Gates in SET suppression using delay and Dual-rail configurations at 0.35 μm.

New insights into single event transient propagation in chains of inverters-evidence for propagation-induced pulse broadening.