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Soft Error Rates In Deep-submicron Cmos Technologies
Soft-errors induced by terrestrial neutrons and natural alpha-particle emitters in advanced memory circuits at ground level. Single-event transient pulse quenching in advanced CMOS logic circuits. HBD using cascode-voltage switch logic gates for SET tolerant digital designs. In addition, the SE induced coupling delay effect has been studied and compared to radiation induced soft delay effect for various technologies. check over here
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